diff --git a/ve/bollaclv.src b/ve/bollaclv.src
index 6b0087e5d..7acee9f4f 100755
--- a/ve/bollaclv.src
+++ b/ve/bollaclv.src
@@ -186,7 +186,7 @@ Col(23)=FR_CODDEPC
 Col(24)=FR_TIPORIGA
 
 [RIGHE]
-Tipo(0)=16
+Tipo(0)=21
 
 [HANDLERS]
 // Handler(0) = F_ORAPART|1
diff --git a/ve/verig.h b/ve/verig.h
index 7a397197b..c9b010779 100755
--- a/ve/verig.h
+++ b/ve/verig.h
@@ -88,7 +88,7 @@
 #define FR_CDC11       150
 #define FR_CDC12       151
 #define FR_CODAGG1     152
-#define FR_CAULAV      153   // Lavanderie
+#define FR_CAULAV      152   // Lavanderie
 #define FR_CODAGG2     153
 #define FR_TIPODET     154
 
diff --git a/ve/verig.uml b/ve/verig.uml
index c76b66b34..522de909f 100755
--- a/ve/verig.uml
+++ b/ve/verig.uml
@@ -1985,7 +1985,7 @@ END
 ENDIF
 
 IFDEF(FLD_CODAGG2)
-NUMBER FR_CODAGG2 13 5
+STRING FR_CODAGG2 13 5
 BEGIN
 IFDEF(X_CODAGG2)
   PROMPT X_CODAGG2 Y_CODAGG2 PR_CODAGG2
diff --git a/ve/verig16.ini b/ve/verig21.ini
similarity index 100%
rename from ve/verig16.ini
rename to ve/verig21.ini
diff --git a/ve/verig16.uml b/ve/verig21.uml
similarity index 100%
rename from ve/verig16.uml
rename to ve/verig21.uml